	.arch armv8-a
	.arch_extension crc
	.arm
	.data
	.global a
	.align 4
	.size a, 4
a:
	.word 0
	.global b
	.align 4
	.size b, 4
b:
	.word 0
	.global d
	.align 4
	.size d, 4
d:
	.word 0
	.text
	.global set_a
	.type set_a , %function
set_a:
	push {r4, r5, r9, r10, fp, lr}
	mov fp, sp
	sub sp, sp, #4
.L111:
	str r0, [fp, #-4]
	ldr r10, [fp, #-4]
	ldr r9, addr_a0
	str r10, [r9]
	ldr r4, addr_a0
	ldr r5, [r4]
	mov r0, r5
	add sp, sp, #4
	pop {r4, r5, r9, r10, fp, lr}
	bx lr

	.global set_b
	.type set_b , %function
set_b:
	push {r4, r5, r9, r10, fp, lr}
	mov fp, sp
	sub sp, sp, #4
.L113:
	str r0, [fp, #-4]
	ldr r10, [fp, #-4]
	ldr r9, addr_b0
	str r10, [r9]
	ldr r4, addr_b0
	ldr r5, [r4]
	mov r0, r5
	add sp, sp, #4
	pop {r4, r5, r9, r10, fp, lr}
	bx lr

	.global set_d
	.type set_d , %function
set_d:
	push {r4, r5, r9, r10, fp, lr}
	mov fp, sp
	sub sp, sp, #4
.L115:
	str r0, [fp, #-4]
	ldr r10, [fp, #-4]
	ldr r9, addr_d0
	str r10, [r9]
	ldr r4, addr_d0
	ldr r5, [r4]
	mov r0, r5
	add sp, sp, #4
	pop {r4, r5, r9, r10, fp, lr}
	bx lr

	.global main
	.type main , %function
main:
	push {r4, r5, r6, r7, r9, r10, fp, lr}
	mov fp, sp
	sub sp, sp, #24
.L117:
	ldr r10, =2
	ldr r9, addr_a0
	str r10, [r9]
	ldr r4, =3
	ldr r5, addr_b0
	str r4, [r5]
	mov r0, #0
	bl set_a
	mov r4, r0
	cmp r4, #0
	cmp r4, #0
	bne .L120
	b .L127
.L118:
	b .L119
.L119:
	ldr r4, addr_a0
	ldr r5, [r4]
	mov r0, r5
	bl putint
	mov r0, #32
	bl putch
	ldr r4, addr_b0
	ldr r5, [r4]
	mov r0, r5
	bl putint
	mov r0, #32
	bl putch
	ldr r4, =2
	ldr r5, addr_a0
	str r4, [r5]
	ldr r4, =3
	ldr r5, addr_b0
	str r4, [r5]
	mov r0, #0
	bl set_a
	mov r4, r0
	cmp r4, #0
	cmp r4, #0
	bne .L139
	b .L146
.L120:
	mov r0, #1
	bl set_b
	mov r4, r0
	cmp r4, #0
	cmp r4, #0
	bne .L118
	b .L135
.L123:
	b .L119
.L127:
	b .L119
.L131:
	b .L119
.L135:
	b .L119
.L137:
	b .L138
.L138:
	ldr r4, addr_a0
	ldr r5, [r4]
	mov r0, r5
	bl putint
	mov r0, #32
	bl putch
	ldr r4, addr_b0
	ldr r5, [r4]
	mov r0, r5
	bl putint
	mov r0, #10
	bl putch
	ldr r4, =1
	str r4, [fp, #-24]
	ldr r4, =2
	ldr r5, addr_d0
	str r4, [r5]
	ldr r4, [fp, #-24]
	cmp r4, #0
	cmp r4, #1
	movge r4, #1
	movle r4, #0
	bge .L159
	b .L166
.L139:
	mov r0, #1
	bl set_b
	mov r4, r0
	cmp r4, #0
	cmp r4, #0
	bne .L137
	b .L154
.L142:
	b .L138
.L146:
	b .L138
.L150:
	b .L138
.L154:
	b .L138
.L157:
	b .L158
.L158:
	ldr r4, addr_d0
	ldr r5, [r4]
	mov r0, r5
	bl putint
	mov r0, #32
	bl putch
	ldr r4, [fp, #-24]
	cmp r4, #0
	cmp r4, #1
	movle r4, #1
	movge r4, #0
	ble .L175
	b .L184
.L159:
	mov r0, #3
	bl set_d
	mov r4, r0
	cmp r4, #0
	cmp r4, #0
	bne .L157
	b .L173
.L161:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L162:
	b .L161
.L166:
	b .L158
.L169:
	b .L158
.L173:
	b .L158
.L175:
	b .L176
.L176:
	ldr r4, addr_d0
	ldr r5, [r4]
	mov r0, r5
	bl putint
	mov r0, #10
	bl putch
	ldr r4, =2
	ldr r5, =1
	add r6, r4, r5
	ldr r4, =3
	sub r5, r4, r6
	ldr r4, =16
	cmp r4, r5
	movge r4, #1
	movle r4, #0
	bge .L193
	b .L197
.L177:
	mov r0, #4
	bl set_d
	mov r4, r0
	cmp r4, #0
	cmp r4, #0
	bne .L175
	b .L191
.L179:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L180:
	b .L179
.L184:
	b .L177
.L187:
	b .L176
.L191:
	b .L176
.L193:
	mov r0, #65
	bl putch
	b .L194
.L194:
	ldr r4, =25
	ldr r5, =7
	sub r6, r4, r5
	ldr r4, =6
	ldr r5, =3
	mul r7, r4, r5
	ldr r4, =36
	sub r5, r4, r7
	cmp r6, r5
	bne .L198
	b .L202
.L197:
	b .L194
	b .F0
.LTORG
addr_a0:
	.word a
addr_b0:
	.word b
addr_d0:
	.word d
.F0:
.L198:
	mov r0, #66
	bl putch
	b .L199
.L199:
	ldr r4, =1
	cmp r4, #8
	movlt r4, #1
	movgt r4, #0
	ldr r5, =7
	ldr r6, =2
	sdiv r7, r5, r6
	mul r6, r7, r6
	sub r7, r5, r6
	mov r5, r4
	cmp r5, r7
	bne .L203
	b .L211
.L202:
	b .L199
.L203:
	mov r0, #67
	bl putch
	b .L204
.L204:
	ldr r4, =3
	cmp r4, #4
	movgt r4, #1
	movlt r4, #0
	mov r5, r4
	cmp r5, #0
	beq .L212
	b .L220
.L206:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L207:
	b .L206
.L211:
	b .L204
.L212:
	mov r0, #68
	bl putch
	b .L213
.L213:
	ldr r4, =102
	cmp r4, #63
	movle r4, #1
	movge r4, #0
	mov r5, r4
	ldr r4, =1
	cmp r4, r5
	beq .L221
	b .L229
.L215:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L216:
	b .L215
.L220:
	b .L213
.L221:
	mov r0, #69
	bl putch
	b .L222
.L222:
	ldr r4, =5
	ldr r5, =6
	sub r6, r4, r5
	ldr r4, =0
	cmp r4, #0
	moveq r4, #1
	movne r4, #0
	cmp r4, #0
	mov r5, r4
	ldr r4, =0
	sub r7, r4, r5
	cmp r7, #0
	mov r4, r7
	cmp r6, r4
	beq .L230
	b .L245
.L224:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L225:
	b .L224
.L229:
	b .L222
.L230:
	mov r0, #70
	bl putch
	b .L231
.L231:
	mov r0, #10
	bl putch
	ldr r4, =0
	str r4, [fp, #-20]
	ldr r4, =1
	str r4, [fp, #-16]
	ldr r4, =2
	str r4, [fp, #-12]
	ldr r4, =3
	str r4, [fp, #-8]
	ldr r4, =4
	str r4, [fp, #-4]
	b .L251
.L234:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L235:
	b .L234
.L239:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L240:
	b .L239
.L245:
	b .L231
.L251:
	ldr r4, [fp, #-20]
	cmp r4, #0
	cmp r4, #0
	bne .L254
	b .L261
.L252:
	mov r0, #32
	bl putch
	b .L251
.L253:
	ldr r4, [fp, #-20]
	cmp r4, #0
	cmp r4, #0
	bne .L271
	b .L280
.L254:
	ldr r4, [fp, #-16]
	cmp r4, #0
	cmp r4, #0
	bne .L252
	b .L269
.L257:
	b .L253
.L261:
	b .L253
.L265:
	b .L253
.L269:
	b .L253
.L271:
	mov r0, #67
	bl putch
	b .L272
.L272:
	ldr r4, [fp, #-20]
	cmp r4, #0
	ldr r5, [fp, #-16]
	cmp r5, #0
	cmp r4, r5
	movge r4, #1
	movle r4, #0
	bge .L290
	b .L303
.L273:
	ldr r4, [fp, #-16]
	cmp r4, #0
	cmp r4, #0
	bne .L271
	b .L288
.L276:
	b .L273
.L280:
	b .L273
.L284:
	b .L272
.L288:
	b .L272
.L290:
	mov r0, #72
	bl putch
	b .L291
.L291:
	ldr r4, [fp, #-12]
	cmp r4, #0
	ldr r5, [fp, #-16]
	cmp r5, #0
	cmp r4, r5
	movge r4, #1
	movle r4, #0
	bge .L317
	b .L328
.L292:
	ldr r4, [fp, #-16]
	cmp r4, #0
	ldr r5, [fp, #-20]
	cmp r5, #0
	cmp r4, r5
	movle r4, #1
	movge r4, #0
	ble .L290
	b .L314
	b .F1
.LTORG
addr_a1:
	.word a
addr_b1:
	.word b
addr_d1:
	.word d
.F1:
.L294:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L295:
	b .L294
.L298:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L299:
	b .L298
.L303:
	b .L292
.L305:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L306:
	b .L305
.L309:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L310:
	b .L309
.L314:
	b .L291
.L315:
	mov r0, #73
	bl putch
	b .L316
.L316:
	ldr r4, [fp, #-20]
	cmp r4, #0
	ldr r5, [fp, #-16]
	cmp r5, #0
	cmp r5, #0
	moveq r5, #1
	movne r5, #0
	cmp r5, #0
	mov r6, r5
	cmp r4, r6
	beq .L343
	b .L360
.L317:
	ldr r4, [fp, #-4]
	cmp r4, #0
	ldr r5, [fp, #-8]
	cmp r5, #0
	cmp r4, r5
	bne .L315
	b .L339
.L319:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L320:
	b .L319
.L323:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L324:
	b .L323
.L328:
	b .L316
.L330:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L331:
	b .L330
.L334:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L335:
	b .L334
.L339:
	b .L316
.L340:
	mov r0, #74
	bl putch
	b .L341
.L341:
	ldr r4, [fp, #-20]
	cmp r4, #0
	ldr r5, [fp, #-16]
	cmp r5, #0
	cmp r5, #0
	moveq r5, #1
	movne r5, #0
	cmp r5, #0
	mov r6, r5
	cmp r4, r6
	beq .L383
	b .L402
.L342:
	ldr r4, [fp, #-4]
	cmp r4, #0
	ldr r5, [fp, #-4]
	cmp r5, #0
	cmp r4, r5
	movge r4, #1
	movle r4, #0
	bge .L340
	b .L382
.L343:
	ldr r4, [fp, #-8]
	cmp r4, #0
	ldr r5, [fp, #-8]
	cmp r5, #0
	cmp r4, r5
	movlt r4, #1
	movgt r4, #0
	blt .L340
	b .L371
.L345:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L346:
	b .L345
.L349:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L350:
	b .L349
.L354:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L355:
	b .L354
.L360:
	b .L342
.L362:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L363:
	b .L362
.L366:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L367:
	b .L366
.L371:
	b .L342
.L373:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L374:
	b .L373
.L377:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L378:
	b .L377
.L382:
	b .L341
.L383:
	mov r0, #75
	bl putch
	b .L384
.L384:
	mov r0, #10
	bl putch
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L385:
	ldr r4, [fp, #-8]
	cmp r4, #0
	ldr r5, [fp, #-8]
	cmp r5, #0
	cmp r4, r5
	movlt r4, #1
	movgt r4, #0
	blt .L403
	b .L414
.L387:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L388:
	b .L387
.L391:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L392:
	b .L391
.L396:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L397:
	b .L396
.L402:
	b .L385
.L403:
	ldr r4, [fp, #-4]
	cmp r4, #0
	ldr r5, [fp, #-4]
	cmp r5, #0
	cmp r4, r5
	movge r4, #1
	movle r4, #0
	bge .L383
	b .L425
	b .F2
.LTORG
addr_a2:
	.word a
addr_b2:
	.word b
addr_d2:
	.word d
.F2:
.L405:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L406:
	b .L405
.L409:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L410:
	b .L409
.L414:
	b .L384
.L416:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L417:
	b .L416
.L420:
	mov r0, #0
	add sp, sp, #24
	pop {r4, r5, r6, r7, r9, r10, fp, lr}
	bx lr
.L421:
	b .L420
.L425:
	b .L384

addr_a3:
	.word a
addr_b3:
	.word b
addr_d3:
	.word d
